The invention relates to a method and system for characterizing coupling capacitance between integrated circuit interconnects. The problem of characterizing on-chip wiring parameters such as per unit length capacitance and resistance associated with back end of the line(BEOL) chip technology has been in the inability to quantify process variations across the chip and/or wafer. With increased focus on fine line technology, wire to wire coupling capacitance characterization is important in BEOL process development and manufacturing.
Current measurement techniques applied to measure the capacitance and resistance are either passive or active in nature. Passive measurement techniques can characterize coupling capacitance as well as total capacitance and resistance. Unfortunately, accurate passive measurements are cumbersome due to the fact that the measuring structure has to be large to obtain accuracy in the measurement procedure and are used in limited applications for manufacturing level testing. Active techniques such as recirculating ring oscillators (RLF) can easily be applied during manufacturing testing but are limited in scope as to the information that can be derived with respect to the capacitance of the structure.